In recent years, with the development of electronics technology, mobile electronic devices such as cellular phones and laptop personal computers, and in-car electronic devices to be installed on cars have been becoming common, and the reduction in size with multi-functionalization has been required for the electronic devices.
On the other hand, in order to achieve the reduction in size with multi-functionalization for the electronic devices, more semiconductor elements have been used such as various types of ICs and LSI, and accordingly, the electronic devices have been decreasing their noise immunity.
Therefore, power lines for semiconductor elements are provided with a film capacitor, a laminated ceramic capacitor, a laminated semiconductor ceramic capacitor, or the like as a bypass capacitor, to ensure the noise immunity to the electronic devices.
In particular, in the case of car navigation systems, car audio systems, in-car ECUs, etc., what is commonly the case is that a capacitor with a capacitance on the order of 1 nF is connected to an external terminal, thereby to absorb high-frequency noises.
However, while these capacitors deliver superior performance on the absorption of high-frequency noises, the capacitors themselves have no function of absorbing high-voltage pulses or static electricity. For this reason, if the high-voltage pulses or static electricity are input to the electronic devices, there is a possibility that the high-voltage pulses or static electricity may cause the electronic device to malfunction or cause the semiconductor elements to be broken. In particular, when the capacitor has a low capacitance on the order of 1 nF, since an ESD (electro-static discharge) withstand voltage is extremely low (for example, about 2 to 4 kV), there is a possibility that this may cause the capacitor to brake.
Thus, conventionally, as shown in FIG. 4(a), ESD countermeasure is taken by connecting a zener diode 105 in parallel with a capacitor 104 connected to a power source line 103 connecting between an external terminal 101 and a semiconductor element 102 such as an IC, or connecting a varistor 106 in parallel with the capacitor 104, as shown in FIG. 4(b).
However, when the zener diode 105 or the varistor 106 is connected in parallel with the capacitor 104 as described above, the number of components is increased to cause an increase in cost, and moreover, the space for the placement of the components has to be secured, and there is thus a possibility that an increase in the size of the device is caused.
On the other hand, a SrTiO3-based grain boundary insulated laminated semiconductor ceramic capacitor is known to have a varistor characteristic, and receives attention as a countermeasure item for ESD since an application of a voltage of a certain level or more allows a large current to flow.
Accordingly, if this type of the laminated semiconductor ceramic capacitor can have immunity to ESD and protect the semiconductor element 102, only a single laminated semiconductor ceramic capacitor 107 can cover both functions as shown in FIG. 5 thereby avoiding, or at least reducing, the need to provide a zener diode 105 or a varistor 106. As a result, the number of components and/or cost are reduced, standardization of design is facilitated, and a capacitor having added values can be provided.
WO 2012/176714 A proposes a ceramic powder which is used for SrTiO3-based grain boundary insulated semiconductor ceramic and in which a specific surface area is 4.0 m2/g or more and 8.0 m2/g or less and a 90% cumulative diameter D90 is 1.2 μm or less.
In WO 2012/176714 A, a heat-treated powder whose specific surface area is 4.0 m2/g or more and 8.0 m2/g or less and 90% cumulative diameter D90 is 1.2 μm or less is prepared by weighing a Sr compound, a Ti compound and a donor compound in predetermined amounts, mixing/pulverizing these compounds and calcining the resulting powder to prepare a calcined powder, and adding a dispersant with an acceptor compound to the calcined powder, dispersing the resulting mixture of calcined powder while wet-mixing for a predetermined time, and then heat-treating the mixture.
Then, the fired crystal grains coarsening is suppressed by using the heat-treated powder, thereby attempting to attain a semiconductor ceramic capacitor having good ESD withstand voltage.